Optimization of layered self-timed
interfaces
- Yacoub, G.Y.; Soni, T.; Ku, W.H.
Editor(s): Singh, A.
California Univ., San
Diego, La Jolla, CA, USA
This paper appears in:
Signals, Systems and Computers, 1992. 1992 Conference Record
of The Twenty-Sixth Asilomar Conference on
On page(s):
289 - 293 vol.1
26-28 Oct. 1992
1992
ISBN: 0-8186-3160-0
Number of
Pages: 2 vol. (xviii+xix+1156)
References Cited:
12
INSPEC Accession Number: 4607817
Abstract:
An approach for designing digital CMOS layered
self-timed interfaces is presented. Each layered interface consists
of a region containing m optimizable transmitter-receiver pairs such
that transmission channel i is characterized by the three-vector
attribute x/sub i/=(R/sub o,/ C/sub g,/ 1). A layer is sized by
minimizing a hybrid cost function subject to one or more constraint
functions selected from a menu. This approach specifically treats
two-cycle bundled data protocols but can be generalized to other
asynchronous signaling schemes as well as synchronous data
transmission. The design paradigm is illustrated by solving a
nonlinear constrained optimization problem which adequately accounts
for the effect of wire inductance on signal delay. The approach
achieves appreciable speedup in the overall design task.
Index Terms:
CMOS integrated circuits; data communication
equipment; digital integrated circuits; optimisation; VLSI; layered
self-timed interfaces; CMOS; transmitter-receiver pairs;
transmission channel; three-vector attribute; hybrid cost function;
constraint functions; two-cycle bundled data protocols; asynchronous
signaling schemes; synchronous data transmission; design paradigm;
nonlinear constrained optimization problem; wire inductance; signal
delay |
